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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM72F10/D 8MB Synchronous Fast Static RAM Module The MCM72F10 (2MB) is configured as 1M x 72 bits. It is packaged in a 168-pin dual-in-line memory module DIMM. The module uses Motorola's 3.3 V, 256K x 18 bit flow-through BurstRAMs. Address (A), data inputs (DQ, DP), and all control signals except output enable (G) are clock (K) controlled through positive-edge-triggered noninverting registers. Write cycles are internally self-timed and initiated by the rising edge of the clock (K) input. This feature provides increased timing flexibility for incoming signals. Synchronous byte write (W) allows writes to either individual bytes or to both bytes. * * * * * * * Single 3.3 V + 10%, - 5% Power Supply Plug and Pin Compatibility with 1MB, 2MB, and 4MB Multiple Clock Pins for Reduced Loading All Inputs and Outputs are LVTTL Compatible Byte Write Capability Fast SRAM Access Times: 8/9/12 ns High Quality Multi-Layer FR4 PWB With Separate Power and Ground Planes * Amp Connector, Part Number: 390064-4 * 168-Pin DIMM Module MCM72F10 168-LEAD DIMM CASE TBD TOP VIEW 1 11 40 41 84 REV 1 11/26/97 (c) Motorola, Inc. 1997 MOTOROLA FAST SRAM MCM72F10 1 BLOCK DIAGRAM 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 VDD VSS 256K x 18 E0 G0 A0 - A17 ADSP W0 W1 KO SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 256K x 18 SE1 G A0 - A17 ADSC SBa SBb K DQa0 - DQa7 DQa8 DQb0 - DQb7 DQb8 SE2 ADV ADSP SGW SW LBO SE3 W2 W3 K1 W4 W5 K2 W6 W7 K3 A18 VDD VSS DQ0 - DQ7 DP0 DQ8 - DQ15 DP1 DQ16 - DQ23 DP2 DQ24 - DQ31 DP3 DQ32 - DQ39 DP4 DQ40 - DQ47 DP5 DQ48 - DQ55 DP6 DQ56 - DQ63 DP7 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G VDD VSS E1 G1 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G 256K x 18 A0 - A17 ADSC SBa SBb K DQb8 DQb0 - DQb7 DQa8 DQa0 - DQa7 SE2 ADV ADSP SGW SW LBO SE3 SE1 G VDD VSS MCM72F10 2 MOTOROLA FAST SRAM PIN ASSIGNMENT 168-LEAD DIMM TOP VIEW VSS DQ63 DQ62 VDD DQ60 DQ58 VSS DQ56 DQ55 VSS DQ53 DQ51 VSS DQ49 DP5 VDD DQ46 DQ44 VSS DQ42 DQ40 VSS DQ39 DQ37 VSS DQ35 DQ33 VSS K3 VSS DP3 DQ30 VDD DQ28 DQ26 VSS DQ24 DQ23 VSS DQ21 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 VSS DP7 DQ61 VSS DQ59 DQ57 VSS DP6 DQ54 VDD DQ52 DQ50 VSS DQ48 DQ47 VSS DQ45 DQ43 VSS DQ41 DP4 VDD DQ38 DQ36 VSS DQ34 DQ32 VSS K2 VSS DQ31 DQ29 VSS DQ27 DQ25 VSS DP2 DQ22 VDD DQ20 DQ19 VSS DQ17 DP1 VDD DQ14 DQ12 VSS DQ10 DQ8 VSS DQ7 DQ5 VSS DQ3 DQ1 VDD NC A18 VSS A16 A14 VSS A12 A10 VSS A8 A6 VDD A4 A2 A0 VSS K1 VSS W7 W5 VSS W3 W1 VSS G1 E1 VSS 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 DQ18 VSS DQ16 DQ15 VSS DQ13 DQ11 VSS DQ9 DP0 VDD DQ6 DQ4 VSS DQ2 DQ0 VSS NC A17 VSS A15 A13 VDD A11 A9 VSS A7 A5 VSS A3 A1 ADSP VSS K0 VSS W6 W4 VSS W2 W0 VDD G0 E0 VSS MOTOROLA FAST SRAM MCM72F10 3 PIN DESCRIPTIONS Pin Locations 59, 61, 62, 64, 65, 67, 68, 70, 71, 72, 143, 145, 146, 148, 149, 151, 152, 154, 155 156 15, 31, 44, 86, 92, 105, 121, 134 2, 3, 5, 6, 8, 9, 11, 12, 14, 17, 18, 20, 21, 23, 24, 26, 27, 32, 34, 35, 37, 38, 40, 41, 43, 46, 47, 49, 50, 52, 53, 55, 56, 87, 89, 90, 93, 95, 96, 98, 99, 101, 102, 104, 107, 108, 110, 111, 115, 116, 118, 119, 122, 124, 125, 127, 128, 130, 131, 133, 136, 137, 139, 140 83, 167 82, 166 Symbol A0 - A18 Type Input Description Synchronous Address Inputs: These inputs are registered and must meet setup and hold times. Synchronous Addresss Status Controller: Initiates read, write, or chip deselect cycle. Synchronous Parity Data Inputs/Outputs. I/O Synchronous Data Inputs/Outputs. ADSP DP0 - DP7 DQ0 - DQ63 Input E0, E1 G0, G1 Input Input Synchronous Chip Enable: Active low to enable chip. Negated high -- blocks ADSP or deselects chip when ADSC is asserted. Asynchronous Output Enable Input: Low -- enables output buffer. High -- DQx pins are high impedance. Clock: This signal registers the address, data in, and all control signals except G and LBO. Synchronous Byte Write Inputs: x refers to the byte being written (byte a, b). Power Supply: 3.3 V + 10%, - 5%. Must be connected on all modules. Ground. 29, 74, 113, 158 76, 77, 79, 80, 160, 161, 163, 164 4, 16, 33, 45, 57, 69, 94, 106, 123, 135, 147, 165 1, 7, 10, 13, 19, 22, 25, 28, 30, 36, 39, 42, 48, 51, 54, 60, 63, 66, 73, 75, 78, 81, 84, 85, 88, 91, 97, 100, 103, 109, 112, 114, 117, 120, 126, 129, 132, 138, 141, 144, 150, 153, 157, 159, 162, 168 58, 142 K0 - K3 W0 - W7 VDD VSS Input Input Supply Supply NC No Connection: There is no connection to the chip. DATA RAM MCM69F618A SYNCHRONOUS TRUTH TABLE (See Notes 1, 2, 3, and 4) Next Cycle Deselect Begin Read Read Read Begin Write Write Address Used None External Address Current Current External Current E 1 0 X X 0 X ADSP 0 0 1 1 0 1 G X 0 1 0 X X DQx High-Z DQ High-Z DQ High-Z High-Z WRITE X Read Read Read Write Write NOTES: 1. X = don't care, 1 = logic high, 0 = logic low. 2. Write is defined as any Wx low. 3. G is an asynchronous signal and is not sampled by the clock K. G drives the bus immediately (tGLQX) following G going low. 4. On write cycles that follow read cycles, G must be negated prior to the start of the write cycle to ensure proper write data setup times. G must also remain negated at the completion of the write cycle to ensure proper write data hold times. MCM72F10 4 MOTOROLA FAST SRAM ABSOLUTE MAXIMUM RATINGS (See Note 1) Rating Power Supply Voltage Voltage Relative to VSS (See Note 2) Input Voltage Three State I/O (See Note 2) Output Current (per I/O) Power Dissipation Temperature Under Bias Storage Temperature Symbol VDD Vin, Vout VIT Iout PD Tbias Tstg Value - 0.5 to + 4.6 - 0.5 to VDD + 0.5 VSS - 0.5 to VDD + 0.5 20 4.6 - 10 to + 85 - 55 to + 125 Unit V V V mA W C C This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high-impedance circuit. NOTES: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. 2. This is a steady-state DC parameter that is in effect after the power supply has achieved its nominal operating level. Power sequencing can not be controlled and is not allowed. 3. Power dissipation capability is dependent upon package characteristics and use environment. See Package Thermal Characteristics. PACKAGE THERMAL CHARACTERISTICS -- PBGA Rating Junction to Ambient (@ 200 lfm) Junction to Board (Bottom) Junction to Case (Top) Single Layer Board Four Layer Board Symbol RJA RJB RJC Max 41 19 11 19 Unit C/W C/W C/W Notes 1, 2 3 4 NOTES: 1. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, board population, and board thermal resistance. 2. Per SEMI G38-87. 3. Indicates the average thermal resistance between the die and the printed circuit board. 4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC-883 Method 1012.1). MOTOROLA FAST SRAM MCM72F10 5 DC OPERATING CONDITIONS AND CHARACTERISTICS (3.6 V VDD 3.1 V, TJ = 20 to + 110C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS (Voltages Referenced to VSS = 0 V) Parameter Supply Voltage (Operating Voltage Range) Input High Voltage Input Low Voltage * VIL - 2.0 V for t tKHKH/2. VIH Symbol VDD VIH VIL Min 3.135 1.7 - 0.3* Typ 3.3 -- -- Max 3.6 VDD + 0.3 0.7 Unit V V V VSS VSS - 1.0 V 20% tKHKH (MIN) Figure 1. Undershoot Voltage DC CHARACTERISTICS Parameter Input Leakage Current (0 V Vin VDD) Output Leakage Current (0 V Vin VDD) Output Low Voltage (IOL = + 8.0 mA) Output High Voltage (IOH = - 4.0 mA) Symbol Ilkg(I) Ilkg(O) VOL VOH Min -- -- -- 2.4 Max 1.0 1.0 0.4 -- Unit A A V V POWER SUPPLY CURRENTS Parameter AC Supply Current (Device Selected, All Outputs Open, Cycle Time tKHKH min) MCM72F10DG8 MCM72F10DG9 MCM72F10DG12 Symbol IDDA Min -- Max 3580 3480 3380 3040 1360 Unit mA CMOS Standby Supply Current (Deselected, Clock (K) Cycle Time tKHKH Clock Running Supply Current (Deselected, Clock (K) Cycle Time tKHKH, All Other Inputs Held to Static CMOS Levels Vin VSS + 0.2 V or VDD - 0.2 V) ISB1 ISB2 -- -- mA mA CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TJ = 20 to 110 C, Periodically Sampled Rather Than 100% Tested) Parameter Input Capacitance Address, ADSP E, G Other Inputs Symbol Cin Typ 74 42 26 38 Max 90 50 30 42 Unit pF I/O Capacitance CI/O pF MASS (Periodically Sampled Rather Than 100% Tested) Parameter Mass Max 36 Unit g MCM72F10 6 MOTOROLA FAST SRAM AC OPERATING CONDITIONS AND CHARACTERISTICS (3.6 V VDD 3.1 V, TJ = 20 to + 110C, Unless Otherwise Noted) Input Timing Measurement Reference Level . . . . . . . . . . . . . . 1.25 V Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 2.5 V Input Slew Rate (See Notes 1 and 2) . . . . . . . . . . . . . . . . . . . 1.0 V/ns Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . 1.25 V Output Load . . . . . . . . . . . . . . See Figure 2 Unless Otherwise Noted Output Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 ns DATA RAMs READ/WRITE CYCLE TIMING (See Notes 1, 2, and 3) MCM72F10-8 Parameter P Cycle Time Clock Access Time Output Enable to Output Valid Clock High to Output Active Clock High to Output Change Output Enable to Output Active Output Disable to Q High-Z Clock High to Q High-Z Clock High Pulse Width Clock Low Pulse Width Setup Times: Address ADSP Data In Write Chip Enable Address ADSP, ADSC, ADV Data In Write Chip Enable Symbol S bl tKHKH tKHQV tGLQV tKHQX1 tKHQX2 tGLQX tGHQZ tKHQZ tKHKL tKLKH tAVKH tADKH tDVKH tWVKH tEVKH tKHAX tKHADX tKHDX tKHWX tKHEX Min 10 -- -- 0 2 0 -- 2 4 4 2 Max -- 8 3.5 -- -- -- 3.5 3.5 -- -- -- MCM72F10-9 Min 11 -- -- 0 2 0 -- 2 4.5 4.5 2 Max -- 9 3.5 -- -- -- 3.5 3.5 -- -- -- MCM72F10-12 Min 16.6 -- -- 0 2 0 -- 2 5 5 2 Max -- 12 5 -- -- -- 3.5 3.5 -- -- -- Unit Ui ns ns ns ns ns ns ns ns ns ns ns 4 4 4, 5, 6, 7 4, 6 4, 5, 6 4, 5, 6 4, 5, 6, 7 Notes N Hold Times: 0.5 -- 0.5 -- 0.5 -- ns NOTES: 1. In setup and hold times, write refers to either any SBx and SW or SGW is low. 2. Chip enable is defined as SE1 low, SE2 high, and SE3 low whenever ADSP or ADSC is asserted. 3. All read and write cycle timings are referenced from K or G. 4. Tested per AC Test Load (Figure 2). 5. Measured at 200 mV from steady state. Tested per High-Z Test Load (Figure 2). 6. This parameter is sampled and not 100% tested. 7. At any given voltage and temperature, tKHQZ (Max) is less than tKHQX1 (Min) for a given device and from device to device. Z0 = 50 OUTPUT RL = 50 VL = 1.25 V Figure 2. AC Test Load MOTOROLA FAST SRAM MCM72F10 7 OUTPUT LOAD OUTPUT BUFFER TEST POINT UNLOADED RISE AND FALL TIME MEASUREMENT INPUT WAVEFORM 2.1 0.3 2.1 0.3 OUTPUT WAVEFORM 2.1 0.3 tf 2.1 0.3 tr NOTES: 1. Input waveform has a slew rate of 1 V/ns. 2. Rise time is measured from 0.3 to 2.1 V unloaded. 3. Fall time is measured from 2.1 to 0.3 V unloaded. Figure 3. Unloaded Rise and Fall Time Characterization 3.6 I (mA) MAX - 105 - 105 - 105 VOLTAGE (V) - 83 - 70 - 30 - 10 0 0 0 0 0 - 38 CURRENT (mA) - 105 0.8 TEST POINT 2.9 2.5 2.3 2.1 PULL-UP VOLTAGE (V) - 0.5 0 0.8 1.25 1.5 2.3 2.7 2.9 3.4 3.6 I (mA) MIN - 38 - 38 - 38 - 26 - 20 0 0 0 0 0 50 LOAD 1.25 (a) Pull-Up PULL-DOWN VOLTAGE (V) - 0.5 0 0.4 0.8 1.25 1.6 2.8 3.2 3.4 3.6 I (mA) MIN 0 0 10 20 31 40 40 40 40 46 I (mA) MAX 0 0 20 40 63 80 80 80 80 120 0.3 50 LOAD 0 0 40 CURRENT (mA) 80 VOLTAGE (V) 1.6 1.25 VDD TEST POINT (b) Pull-Down Figure 4. Output Buffer Characteristics MCM72F10 8 MOTOROLA FAST SRAM READ/WRITE CYCLES t KHKH K t KHKL t KLKH Ax A B C D E F G ADSP E W G t KHQV DQx t KHQZ DESELECTED Q(n) Q(A) t KHQX1 READ WRITES Q(B) t KHQX2 Q(C) t GHQZ D(D) D(E) D(F) t GLQX READ t GLQV Q(G) ORDERING INFORMATION (Order by Full Part Number) MCM Motorola Memory Prefix Part Number 72F X XX XX Speed (8 = 8 ns, 9 = 9 ns, 12 = 12 ns) Package (DG = Gold Pad DIMM) Memory Size (10 = 8MB) Full Part Numbers -- MCM72F10DG8 MCM72F10DG9 MCM72F10DG12 MOTOROLA FAST SRAM MCM72F10 9 PACKAGE DIMENSIONS DG PACKAGE CASE TBD MCM72F10 10 MOTOROLA FAST SRAM Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado, 80217. 1-303-675-2140 or 1-800-441-2447 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shagawa-ku, Tokyo, Japan. 03-5487-8488 MfaxTM : RMFAX0@email.sps.mot.com - TOUCHTONE 1-602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 - http://sps.motorola.com /mfax / HOME PAGE : http://motorola.com/sps / CUSTOMER FOCUS CENTER: 1-800-521-6274 MOTOROLA FAST SRAM MCM72F10/D MCM72F10 11 |
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